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skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 1 data sheet SKY72310: spur-free, 2.1 ghz single fractional-n frequency synthesizer applications ? general purpose rf systems ? 2.5g and 3g wireless infrastructure ? broadband wireless access ? low bit rate wireless telemetry ? instrumentation ? l-band receivers ? satellite communications features ? spur-free operation ? 2.1 ghz maximum operating frequency ? ultra-fine step size, 100 hz or less ? high internal reference frequency enables large loop bandwidth implementations ? very fast switching speed (e.g., below 100 s) ? phase noise to C91 dbc/hz inside the loop filter bandwidth @ 1800 mhz ? software programmable power-down modes ? high-speed serial interface up to 100 mbps ? three-wire programming ? programmable division ratios on reference frequency ? phase detector with programmable gain to provide a programmable loop bandwidth ? frequency power steering further enhances rapid acquisition time ? on-chip crystal oscillator ? frequency adjust for temperature compensation ? 3 v operation ? 5 v output to loop filter ? qfn (24-pin, 4 x 4 mm) pb-free (msl3, 260 c per jedec j- std-020) package skyworks offers lead (pb)-free, rohs (restriction of hazardous substances) compliant packaging. description skyworks SKY72310 fractional-n frequency synthesizer provides ultra-fine frequency resolution, fast switching speed, and low phase-noise performance. this synthesizer is a key building block for high-performance radio system designs that require low power and fine step size. the ultra-fine step size of less than 100 hz allows this synthesizer to be used in very narrowband wireless applications. with proper temperature sensing or through control channels, the synthesizers fine step size can compensate for crystal oscillator or intermediate frequency (if) filter drift. as a result, crystal oscillators or crystals can replace temperature-compensated or ovenized crystal oscillators, reducing parts count and associated component cost. the devices fine step size can also be used for doppler shift corrections. the SKY72310 has a phase noise floor of C90 dbc/hz up to 2.1 ghz operation as measured inside the loop bandwidth. this is permitted by the on-chip low noise dividers and low divide ratios provided by the devices high fractionality. reference crystals or oscillators up to 50 mhz can be used with the SKY72310. the crystal frequency is divided down by independent programmable dividers (1 to 32) for the synthesizer. the phase detector can operate at a maximum speed of 25 mhz, which allows better phase noise due to the lower division value. with a high reference frequency, the loop bandwidths can also be increased. larger loop bandwidths improve the settling times and reduce in-band phase noise. therefore, typical switching times of less than 100 s can be achieved. the lower in-band phase noise also permits the use of lower cost voltage controlled oscillators (vcos) in customer applications. the SKY72310 has a frequency power steering circuit that helps the loop filter to steer the vco when the frequency is too fast or too slow, further enhancing acquisition time. the unit operates with a three-wire, high-speed serial interface. a combination of large bandwidth, fine resolution, and the three wire interface allows for direct frequency modulation of the vco. this supports any continuous phase, constant envelope modulation scheme such as frequency modulation (fm), frequency shift keying (fsk), minimum shift keying (msk), or gaussian minimum shift keying (gmsk).
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 2 july 30, 2008 ? skyworks proprietary and confidential information ? products a nd product information are subject to change without notice ? 200705e this capability can eliminate the need for in-phase and quadrature (i/q) digital-to-analog converters (dacs), quadrature upconverters, and if filters from the transmitter portion of the radio system. the device package and pinout for the 24-pin quad flat no-lead (qfn) package are shown in figure 1. figure 2 shows a functional block diagram for the SKY72310. 1 2 3 4 5 6 789101112 24 23 22 21 20 19 18 17 16 15 14 13 vccecl/cml fvco_main fvco_main ld/ps_main v cccp_main cpout_main n/c xtalacgnd/osc xtalin/osc xtalout/nc vccxtal gndxtal mux_out mod_in clock cs data vccdigital n/c n/c n/c n/c n/c n/c s125 8 figure 1. SKY72310 pinout, 24-pin qfn (top view) serial interface modulation unit main divider fvco_main fpd_main fref_main fref cpout_main ld/ps_main fvco_main reference frequency oscillator reference frequency oscillator main phase/freq. detector and charge pump main divider data mod_in mux mux_ou t clock cs fractional unit ? 18-bit registers divider reference frequency dividers lock detection or power steering s1057 msb/lsb dividend pd/charge pump & pwr-dn/mux out control figure 2. SKY72310 functional block diagram
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 3 technical description the SKY72310 is a fractional-n frequency synthesizer using a ? modulation technique. the fractional-n implementation provides low in-band noise by having a low division ratio and fast frequency settling time. in addition, the SKY72310 provides arbitrarily fine frequency resolution with a digital word, so that the frequency synthesizer can be used to compensate for crystal frequency drift in the rf transceiver. serial interface the serial interface is a versatile three-wire interface consisting of three pin signals: clock (serial clock), data (serial input), and cs (chip select). it enables the SKY72310 to operate in a system where one or multiple masters and slaves are present. to perform a loopback test at startup and to check the integrity of the board and processor, the serial data is fed back to the master device (e.g., a microcontroller or microprocessor unit) through a programmable multiplexer. this facilitates hardware and software debugging. ? modulator the SKY72310 provides fractionality through the use of a proprietary, configurable 10-bit or 18-bit ? modulator. the output from the modulator is combined with the divider ratio through its fractional units. vco prescaler the vco prescaler provides low-noise signal conditioning of the vco signal. it translates an off-chip, single-ended or differential signal to an on-chip differential current mode logic (cml) signal. vco divider the SKY72310 provides a programmable divider that controls the cml prescaler and supplies the required signal to the charge pump phase detector. programmable divide ratios ranging from 38 to 537 are possible in fractional-n mode and from 32 to 543 in integer-n mode. reference frequency oscillator the SKY72310 has a self-contained, low-noise crystal oscillator. this crystal oscillator is followed by the clock generation circuitry that generates the required clock for the programmable reference frequency divider. reference frequency divider the crystal oscillator signal can be divided by a ratio of 1 to 32 to create the reference frequency for the phase detector. the divide ratio is programmed using the reference frequency dividers register. note : the divided crystal oscillator frequency (the internal reference frequency), fref_main, is referred to as ?reference frequency? throughout this document. phase detector and charge pump the SKY72310 uses a charge pump phase detector that provides a programmable gain, kd , from 31.25 to 1000 a/2 radians in 32 steps. the phase detector is programmed using the phase detector/charge pump control register. frequency steering when programmed for frequency power steering, the SKY72310 has a circuit that helps the loop filter steer the vco using the ld/psmain signal (pin 4). in this configuration, the ld/psmain signal can provide a more rapid acquisition. when programmed for lock detection, internal frequency steering is implemented and provides frequency acquisition times comparable to conventional phase/frequency detectors. lock detection when programmed for lock detection, the SKY72310 provides an active low, pulsing open collector output using the ld/psmain signal (pin 4) to indicate the out-of-lock condition. when locked, the ld/psmain signal is tri-stated (high impedance). power down the SKY72310 supports a number of power-down modes through the serial interface. for more information, see the register descriptions section of this document. serial interface operation the serial interface consists of three pins: clock (pin 22), data (pin 20), and cs (pin 21). the clock signal controls data on the two serial data lines (data and cs). the data pin shifts bits into a temporary register on the rising edge of clock. the cs signal allows individual selection transfers that synchronize and sample the information of slave devices on the same bus. figure 3 functionally depicts how a serial transfer takes place. a serial transfer is initiated when a microcontroller or microprocessor forces the cs signal to a low state. this is followed immediately by an address/data stream sent to the data pin that coincides with the rising edges of the clock presented at the clock pin. each rising edge of the clock signal shifts in one bit of data on the data line into a shift register. at the same time, one bit of data is shifted out of the mux_out pin (if the serial bit stream is selected) at each falling edge of clock. to load any of the registers, 16 bits of address or data must be presented to the data line with the
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 4 july 30, 2008 ? skyworks proprietary and confidential information ? products a nd product information are subject to change without notice ? 200705e lsb last while the cs signal is low. if the cs signal is low for more than 16 clock cycles, only the last address or data bits are used to load the registers. register programming register programming equations, described in this section, use the following variables and constants: n fractional desired vco division ratio in fractional-n applications. this is a real number and can be interpreted as the reference frequency ( f ref ) multiplying factor so that the resulting frequency is equal to the desired vco frequency. n integer desired vco division ratio in integer-n applications. this number is an integer and can be interpreted as the reference frequency ( f ref ) multiplying factor so that the resulting frequency is equal to the desired vco frequency. n reg nine-bit unsigned input value to the divider ranging from 0 to 511 (integer-n mode) and from 6 to 505 (fractional-n mode). divider this constant equals 262144 when the ? modulator is in 18-bit mode, and 1024 when the ? modulator is in 10-bit mode. dividend when in 18-bit mode, this is the 18-bit signed input value to the ? modulator, ranging from C131072 to +131071 and providing 262144 steps, each step equal to f div_ref /2 18 hz. when in 10-bit mode, this is the 10-bit signed input value to the ? modulator, ranging from C512 to +511 and providing 1024 steps, each step equal to fdiv_ref /2 10 hz. f vco desired vco frequency. f div_ref divided reference frequency presented to the phase detector. fractional-n applications . the desired division ratio for the synthesizer is given by: ref _ div vco fractional f f n = where n fractional must be between 37.5 and 537.5. the value to be programmed in the divider register is given by: 32 ) n ( round n fractional reg ? = note : the round function rounds the number to the nearest integer. when in fractional mode, allowed values for n reg are from 6 to 505 inclusive. the value to be programmed by either of the dividend registers (msb or lsb) is given by: )] 32 n n ( divider [ round dividend reg fractional ? ? = where the divider is either 1024 in 10-bit mode or 262144 in 18-bit mode. therefore, the dividend is a signed binary value either 10 or 18 bits long. note : because of the high fractionality of the SKY72310, there is no practical need for any integer relationship between the reference frequency and the channel spacing or desired vco frequencies. sample calculations for two fractional-n applications are provided in figure 4. x a3 a2 a1 a0 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 xxx clock last data cs c1413 figure 3. serial transfer timing diagram
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 5 case 1 : to achieve a desired f vco_main frequency of 902.4530 mhz using a crystal frequency of 40 mhz with operation of the synthesizer in 18-bit mode. since the maximum internal reference frequency ( f div_ref ) is 25 mhz, the crystal frequency is divided by 2 to obtain a f div_ref of 20 mhz. therefore: n fractional = f vco_main f div_ref = 902.4530 20 = 45.12265 the value to be programmed in the divider register is: n reg = round[ n fractional ] C 32 = round[45.12265] C 32 = 45 C 32 = 13 (decimal) = 000001101 (binary) with the modulator in 18-bit mode, the value to be programmed in the dividend registers is: dividend = round[divider ( n fractional C n reg C 32)] = round[262144 (45.12265 C 13 C 32)] = round[262144 (0.12265)] = round[32151.9616] = 32152 (decimal) = 000111110110011000 (binary) where 00 0111 1101 is loaded in the dividend msb register and 1001 1000 is loaded in the dividend lsb register. summary: divider register = 0 0000 1101 dividend lsb register = 1001 1000 dividend msb register = 00 0111 1101 the resulting vco frequency is 902.453 mhz step size is 76.3 hz note: the frequency step size for this case is 20 mhz divided by 2 18 , giving 76.3 hz. s1059 figure 4. fractional-n applications: sample calculation (1 of 2)
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 6 july 30, 2008 ? skyworks proprietary and confidential information ? products a nd product information are subject to change without notice ? 200705e case 2 : to achieve a desired f vco_main frequency of 917.7786 mhz using a crystal frequency of 19.2 mhz with operation of the synthesizer in 10-bit mode. since the maximum internal reference frequency ( f div_ref ) is 25 mhz, the crystal frequency does not require the internal division to be greater than 1, which makes f div_ref = 19.2 mhz. therefore: n fractional = f vco_main f div_ref = 917.7786 19.2 = 47.80097 the value to be programmed in the divider register is: n reg = round[ n fractional ] C 32 = round[47.80087] C 32 = 48 C 32 = 16 (decimal) = 000010000 (binary) with the modulator in 10-bit mode, the value to be programmed in the dividend registers is: dividend = round[divider ( n fractional C n reg C 32)] = round[1024 (47.80087 C 16 C 32)] = round[1024 (C0.1990312)] = round[C203.808] = 204 (decimal) = 1100110100 (binary) where 11 0011 0100 is loaded in the dividend msb register. summary: divider register = 0 0001 0000 dividend msb register = 11 0011 0100 the resulting vco frequency is 917.775 mhz step size is 18.75 khz note: the frequency step size for this case is 19.2 mhz divided by 2 10 , giving 18.75 khz. s1060 figure 4. fractional-n applications: sample calculation (2 of 2)
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 7 integer-n applications . the desired division ratio for the synthesizer is given by: ref _ div main _ vco eger int f f n = where n integer is an integer number from 32 to 543. the value to be programmed in the divider register is given by: 32 n n eger int reg ? = when in integer mode, allowed values for n reg are from 0 to 511. note : as with all integer-n synthesizers, the minimum step size is related to the crystal frequency and reference frequency division ratio. register loading order . in applications where the synthesizer is in 18-bit mode, the dividend msb register holds the 10 msbs of the dividend and the dividend lsb register holds the 8 lsbs of the dividend. the registers that control the synthesizers divide ratio are to be loaded in the following order: ? divider register ? dividend lsb register ? dividend msb register (at which point the new divide ratio takes effect) in applications where the synthesizer is in 10-bit mode, the dividend msb register holds the 10 bits of the dividend. the registers that control the synthesizers divide ratio are to be loaded in the following order: ? divider register ? dividend msb register (at which point the new divide ratio takes effect) note : when in integer mode, the new divide ratios take effect as soon as the divider register is loaded. direct digital modulation the high fractionality and small step size of the SKY72310 allow the user to tune to practically any frequency in the vcos operating range. this allows direct digital modulation by programming the different desired frequencies at precise instants. typically, the channel frequency is programmed by the main divider and msb/lsb dividend registers, and the instantaneous frequency offset from the carrier is programmed by the modulation data register. the modulation data register can be accessed in three ways as defined in the following subsections. normal register write . a normal 16-bit serial interface write occurs when the cs signal is 16 clock cycles wide. the corresponding 16-bit modulation data is simultaneously presented to the data pin. the content of the modulation data register is passed to the modulation unit at the next falling edge of the divided main vco frequency ( f pd_main ). short cs through data pin (no address bits required) . a shortened serial interface write occurs when the cs signal is from 2 to 12 clock cycles wide. the corresponding modulation data (2 to 12 bits) is simultaneously presented to the data pin. the data pin is the default pin used to enter modulation data directly in the modulation data register with shortened cs strobes. this method of data entry eliminates the register address overhead on the serial interface. all serial interface bits are re- synchronized internally at the reference oscillator frequency. the content of the modulation data register is passed to the modulation unit at the next falling edge of the divided main vco frequency ( f pd_main ). short cs through mod_in pin (no address bits required) . a shortened serial interface write occurs when the cs signal is from 2 to 12 clock cycles wide. the corresponding modulation data (2 to 12 bits) is simultaneously presented on the mod_in pin, an alternate pin used to enter modulation data directly into the modulation data register with shortened cs strobes. this mode is selected through the modulation control register. this method of data entry also eliminates the register address overhead on the serial interface and allows a different device than the one controlling the channel selection to enter the modulation data (e.g., a microcontroller for channel selection and a digital signal processor for modulation data). all serial interface bits are internally re-synchronized at the reference oscillator frequency and the content of the modulation data register is passed to the modulation unit at the next falling edge of the divided main vco frequency ( f pd_main ). modulation data samples in the modulation data register can be from 2 to 12 bits long, and enable the user to select how many distinct frequency steps are to be used for the desired modulation scheme. the user can also control the frequency deviation through the modulation data magnitude offset in the modulation control register. this allows shifting of the modulation data to accomplish a 2 m multiplication of frequency deviation. note: the programmable range of ?0.5 to +0.5 of the main ? modulator can be exceeded up to the condition where the sum of the dividend and the modulation data conform to: 5625 . 0 ) dividend n ( 5625 . 0 mod + + ? when the sum of the dividend and modulation data lie outside this range, the value of n integer must be changed. for a more detailed description of direct digital modulation functionality, refer to the skyworks application note, direct digital
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 8 july 30, 2008 ? skyworks proprietary and confidential information ? products a nd product information are subject to change without notice ? 200705e modulation using the sky72300, sky72301, and sky72302 dual synthesizers/plls (document number 101349). register descriptions table 1 lists the eight 16-bit registers that are used to program the SKY72310. all register writes are programmed address first, followed directly with data. msbs are entered first. on power up, all registers are reset to 0x000 except the divider register at address 0x0, which is set to 0x006. synthesizer registers the divider register contains the integer portion closest to the desired fractional-n (or the integer-n) value minus 32. this register, in conjunction with the dividend registers (which control the fraction offset from ? 0.5 to +0.5), allows selection of a precise frequency. as shown in figure 5, the value to be loaded is: ? synthesizer divider index = nine-bit value for the integer portion of the synthesizer divider. valid values for this register are from 6 to 505 (fractional-n) or 0 to 511 (integer-n). the dividend msb and lsb registers control the fraction part of the desired fractional-n value and allow an offset of ? 0.5 to +0.5 to the main integer selected through the divider register. as shown in figures 6 and 7, values to be loaded are: ? synthesizer dividend (msbs) = ten-bit value for the msbs of the 18-bit dividend for the synthesizer. ? synthesizer dividend (lsbs) = eight-bit value for the lsbs of the 18-bit dividend for the synthesizer. the dividend register msb and lsb values are 2's complement format. note : when in 10-bit mode, the dividend lsb register is not required. the reference frequency divider provides the reference frequency to the phase detector by dividing the crystal oscillator frequency. divide ratios from 1 to 32 are possible for the reference frequency divider (see table 2). the reference frequency dividers register configures the reference frequency divider for the synthesizer. as shown in figure 8, the values to be loaded are: ? reference frequency divider index = desired oscillator frequency division ratio ? 1. default value on power up is 0, signifying that the reference frequency is not divided for the phase detector. table 1. SKY72310 register map address (hex) register (note 1) length (bits) address (bits) 0 divider register 12 4 1 dividend msb register 12 4 2 dividend lsb register 12 4 3 unused 4 unused 5 reference frequency dividers register 12 4 6 phase detector/charge pump control register 12 4 7 power down/multiplexer output select control register 12 4 8 modulation control register 12 4 9 modulation data register modulation data register (note 2) direct input 12 2 length 12 bits 4 0 note 1 : all registers are write only. note 2 : no address bits are required for modulation data. any serial data between 2 and 12 bits long is considered modulation data.
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 9 a3 a2 a1 a0 11 10 9 8 7 6 5 4 3 2 1 0 0000xxx msb lsb synthesizer divider index s1061 figure 5. divider register (write only) s1062 a3 a2 a1 a0 11 10 9 8 7 6 5 4 3 2 1 0 0001xx msb lsb synthesizer dividend (msbs) figure 6. dividend msb register (write only) s106 3 a3 a2 a1 a0 11 10 9 8 7 6 5 4 3 2 1 0 0010xxxx msb lsb synthesizer dividend (lsbs) figure 7. dividend lsb register (write only) table 2. programming the reference frequency divider decimal bit 4 (msb) bit 3 bit 2 bit 1 bit 0 (lsb) reference divider ratio 0 0 0 0 0 0 1 1 0 0 0 0 1 2 2 0 0 0 1 0 3 31 1 1 1 1 1 32
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 10 july 30, 2008 ? skyworks proprietary and confidential information ? products a nd product information are subject to change without notice ? 200705e s1064 a3 a2 a1 a0 11 10 9 8 7 6 5 4 3 2 1 0 0101xx reference frequency divider index figure 8. reference frequency divi ders register (write only) s106 5 a3 a2 a1 a0 11 10 9 8 7 6 5 4 3 2 1 0 0110 phase detector gain power steering/lock detect enable figure 9. phase detector/charge pump control register (write only) s1066 a3 a2 a1 a0 11 10 9 8 7 6 5 4 3 2 1 0 0111xx msb lsb full power down synthesizer power down synthesizer mode synthesizer ? fractionality multiplexer output selection mux_out pin three-state enable figure 10. power down/multiplexer output se lect control register (write only) the phase detector/charge pump control register allows control of the gain for the phase detector and configuration of the ld/psmain signal (pin 4) for frequency power steering or lock detection. as shown in figure 9, the values to be loaded are: ? phase detector gain = five-bit value for programmable phase detector gain. range is from 0 to 31 decimal for 31.25 to 1000 a/ 2 radian, respectively. ? power steering enable = one-bit flag to enable the frequency power steering circuitry of the phase detector. when this bit is cleared, the ld/psmain pin is configured to be a lock detect, active low, open collector pin. when this bit is set, the ld/psmain pin is configured to be a frequency power steering pin and can be used to bypass the external loop filter to provide faster frequency acquisition. the power down/multiplexer output select control register allows control of the power-down modes, internal multiplexer output, and ? synthesizer fractionality. as shown in figure 10, the values to be loaded are: ? full power down = one-bit flag to power down the SKY72310 except for the reference oscillator and the serial interface. when this bit is cleared, the SKY72310 is powered up. when this bit is set, the SKY72310 is in full power-down mode excluding the mux_out signal (pin 24). ? synthesizer power down = one-bit flag to power down the synthesizer. when this bit is cleared, the synthesizer is powered up. when this bit is set, the synthesizer is in power-down mode.
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 11 table 3. multiplexer output multiplexer output select (bit 8) multiplexer output select (bit 7) multiplexer output select (bit 6) multiplexer output (mux_out, pin 24) 0 0 0 reference oscillator 0 0 1 unused 0 1 0 reference frequency ( f ref_main ) 0 1 1 unused 1 0 0 phase detector frequency ( f pd_main ) 1 0 1 serial data out 1 1 0 serial interface test output 1 1 1 unused a3 a2 a1 a0 11 10 9 8 7 6 5 4 3 2 1 0 1 0 0 0 0 000x x reserved bits modulation data magnitude offse t modulation data input select modulation address disable c1425 figure 11. modulation control register (write only) ? synthesizer mode = one-bit flag to power down the ? modulator and fractional unit. when this bit is cleared, the synthesizer is in fractional-n mode. when this bit is set, the synthesizer is in integer-n mode. ? synthesizer ? fractionality = one-bit flag to configure the size of the ? modulator. this has a direct effect on power consumption, and on the level of fractionality and step size. when this bit is cleared, the ? modulator is 18-bit with a fractionality of 2 18 and a step size of f ref_main /262144. when this bit is set, the ? modulator is 10-bit with a fractionality of 2 10 and a step size of f ref_main /1024. note : there are no special power-up sequences required for the SKY72310. ? multiplexer output selection = three-bit value that selects which internal signal is output to the mux_out pin. the following internal signals are available on this pin: ? reference oscillator: f ref ? divided reference (post-reference frequency divider): f ref_main ? phase detector frequency (post-frequency divider): f pd_main ? serial data out for loop-back and test purposes refer to table 3 for more information. ? mux_out pin tri-state enable = one-bit flag to tri-state the mux_out pin. when this bit is cleared, the mux_out pin is enabled. when this bit is set, the mux_out pin is tri-stated. the modulation control register is used to configure the modulation unit of the main synthesizer. the modulation unit adds or subtracts a frequency offset to the selected center frequency at which the main synthesizer operates. the size of the modulation data sample, controlled by the duration of the cs signal, can be from 2 to 12 bits wide to provide from 4 to 4096 selectable frequency offset steps. the modulation data magnitude offset selects the magnitude multiplier for the modulation data and can be from 0 to 8. as shown in figure 11, the values to be loaded are: ? modulation data magnitude offset = four-bit value that indicates the magnitude multiplier (m) for the modulation data samples. valid values range from 0 to 13, effectively providing a 2 m multiplication of the modulation data sample. ? modulation data input select = one-bit flag to indicate the pin on which modulation data samples are serially input when the cs signal is between 2 and 12 bits long. when this bit is cleared, modulation data samples are to be presented on the
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 12 july 30, 2008 ? skyworks proprietary and confidential information ? products a nd product information are subject to change without notice ? 200705e data pin. when this bit is set, modulation data samples are to be presented on the mod_in pin. ? modulation address disable = one-bit flag to indicate the presence of the address as modulation data samples are presented on either the mod_in or data pins. when this bit is cleared, the address is presented with the modulation data samples (i.e., all transfers are 16 bits long). when this bit is set, no address is presented with the modulation data samples (i.e., all transfers are 2 to 12 bits long). the modulation data register is used to load the modulation data samples to the modulation unit. these values are transferred to the modulation unit on the falling edge of f pd_main where they are passed to the main ? modulator at the selected magnitude offset on the next falling edge of f pd_main . modulation data register values are 2's complement format. as shown in figure 12, the value to be loaded is: ? modulation data bits = modulation data samples that represent the instantaneous frequency offset to the selected main synthesizer frequency (selected channel) before being affected by the modulation data magnitude offset. package and handling information since the device package is sensitive to moisture absorption, it is baked and vacuum packed before shipping. instructions on the shipping container label regarding exposure to moisture after the container seal is broken must be followed. otherwise, problems related to moisture absorption may occur when the part is subjected to high temperature during solder assembly. the SKY72310 is rated to moisture sensitivity level 3 (msl3) at 260 c. it can be used for lead or lead-free soldering. care must be taken when attaching this product, whether it is done manually or in a production solder reflow environment. production quantities of this product are shipped in a standard tape and reel format. for packaging details, refer to the skyworks application note, tape and reel , document number 101568. electrical and mechanical specifications signal pin assignments and functional pin descriptions are described in table 4. the absolute maximum ratings of the SKY72310 are provided in table 5. the recommended operating conditions are specified in table 6 and electrical specifications are provided in table 7. figure 13 provides a schematic diagram for the SKY72310 using skyworks sky73120 890-960 mhz vco. figure 14 provides a schematic diagram for the SKY72310 using a non-skyworks vco. figure 15 shows the package dimensions for the 24-pin qfn and figure 16 provides the tape and reel dimensions. electrostatic discharge (esd) sensitivity the SKY72310 is a static-sensitive electronic device. do not operate or store near strong electrostatic fields. take proper esd precautions. a3 a2 a1 a0 11 10 9 8 7 6 5 4 3 2 1 0 1 0 0 1 msb lsb modulation data bits c1426 figure 12. modulation data register (write only)
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 13 table 4. SKY72310 signal descriptions pin # pin name type description 1 vccecl/cml power and ground ecl/cml, 3 v. removing power safely powers down the associated divider chain and charge pump. 2 fvco_main input main vco differential input. 3 fvco_main input main vco complimentary differential input. 4 ld/ps_main analog output programmable output pin. indicates pha se detector out-of-lock as an active low pulsing open collecto r output (high impedance when lock is detected), or helps the loop filter steer the vco. this pin is configured using the phase detector/charge pump control register. 5 vcccp_main (note 1) power and ground charge pump supply, 3 to 5 v. removing power safely powers do wn the associated divider chain and charge pump. 6 cpout_main analog output charge pump output. the gain of the charge pump phase detector is controlled by the phase detector/charge pump control register. 7 n/c C no connection 8 xtalacgnd/osc ground/input refere nce crystal ac ground or external oscillator differential input. 9 xtalin/osc input reference crystal input or external oscillator differential input. 10 xtalout/nc input reference crystal output or no connect. 11 vccxtal power and ground crystal oscillator ecl/cml, 3 v. 12 gndxtal power and ground crystal oscillator ground. 13 n/c C no connection 14 n/c C no connection 15 n/c C no connection 16 n/c C no connection 17 n/c C no connection 18 n/c C no connection 19 vccdigital (note 1) power and ground digital supply, 3 v. 20 data digital input serial address and data input pin. address bits are followed by data bits. 21 cs digital input active low enable pin. enables loading of address and data on th e data pin on the rising edge of clock. when cs goes high, data is transferred to the regist er indicated by the address. subsequent clock edges are ignored. 22 clock digital input clock signal pin. when cs is low, the regist er address and data are shifted in address bits first on the data pin on the rising edge of clock. 23 mod_in digital input alternate serial modulation data input pin. address bits are followed by data bits. 24 mux_out digital output internal multip lexer output. selects from oscillator fre quency, reference frequency, divided vco frequency, serial data out, or testability signals. this pin can be tri-stated from the synthesizer registers. note 1 : associated pairs of power and gro und pins must be decoupled using 0.1 f capacitors. table 5. absolute maximum ratings parameter min max units maximum analog rf supply voltage 3.6 vdc maximum digital supply voltage 3.6 vdc maximum charge pump supply voltage 5.25 vdc storage temperature C65 +150 c operating temperat ure C40 +85 c note : exposure to maximum rating conditions for extended periods may reduce device reliability. there is no damage to device with o nly one parameter set at the limit and all other parameters set at or below their nominal values.
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 14 july 30, 2008 ? skyworks proprietary and confidential information ? products a nd product information are subject to change without notice ? 200705e table 6. recommended operating conditions parameter min max units analog rf supplies 2.7 3.3 vdc digital supply 2.7 3.3 vdc charge pump supplies 2.7 5.0 vdc operating temperature (t a ) C40 +85 c table 7. electrical characteristics (1 of 2) (vdd = 3 v, t a = 25 c, unless otherwise noted) parameter symbol test co nditions min typ max units power consumption total power consumption p total charge pump current of 200 a, synthesizer fractional, f ref _ main = 20 mhz 37.5 mw power-down current i cc - pwdn 10 (note 1) a reference oscillator reference oscillator frequency f osc 50 mhz oscillator sensitivity (as a buffer) v osc ac coupled, single-ended 0.1 2.0 vpp frequency shift versus supply voltage f shift _ supply 2.7 v v xtal 3.3 v 0.3 ppm vco synthesizer operating frequency f vco _ main sinusoidal, C40 c to +85 c 100 (note 2) 2100 mhz rf input sensitivity v vco ac coupled 50 250 mv peak rf input impedance z vco _ in 94 C j140 @ 1200 mhz ? fractional-n tuning step size ? f step _ main f ref _ main /2 18 or f ref _ main /2 10 hz noise phase noise floor p nf measured inside the loop bandwidth using 25 mhz reference frequency, C40 c to +85 c C128 + 20 log (n) dbc/hz phase detector and charge pump phase detector frequency f ref _ main C40 c to +85 c 25 mhz charge pump output source current i cp - source v cp = 0.5 vcc cp 125 1000 a charge pump output sink current i cp - sink v cp = 0.5 vcc cp C125 C1000 a charge pump accuracy i cp - accuracy 20 % charge pump output voltage linearity range i cp vs v cp 0.5 v v cp (vcc cp C 0.5 v) gnd + 400 vcc cp C 400 mv charge pump current versus temperature i cp vs t v cp = 0.5 vcc cp C40 c < t < +85 c 5 % charge pump current versus voltage i cp vs v cp 0.5 v v cp (vcc cp C 0.5 v) 8 %
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 15 table 7. electrical characteristics (2 of 2) (vdd = 3 v, t a = 25 c, unless otherwise noted) parameter symbol test co nditions min typ max units digital pins high level input voltage v ih 0.7 v digital v low level input voltage v il 0.3 v digital v high level output voltage v oh i oh = C2 ma v digital C0.2 v low level output voltage v ol i ol = +2 ma gnd + 0.2 v timing C serial interface clock frequency f clock 100 mhz data and cs set up time to clock rising t su 3 ns data and cs hold time after clock rising t hold 0 ns note 1: a 5 v charge pump power supply on pin 5 re sults in higher power-down leakage current. note 2 : the minimum synthesizer frequency is 12 x f osc , where f osc is the frequency at the xtalin/osc pin.
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 16 july 30, 2008 ? skyworks proprietary and confidential information ? products a nd product information are subject to change without notice ? 200705e vccd_fnfs vccmecl/cml_3v vccxa_3v vccmecl/cml_3v vcccpm_3v vccmecl/cml_3v power supply vcom_out tantalum 7343 tajae107k016 jp6 vccecl/cml 1 fvco_main 2 fvco_main 3 ld/ps_main 4 vcccp_main 5 cpout_main 6 n/c 7 xtalacgnd/osc xtalin/osc xtalout/nc vccxtal 8 9 10 11 gndxtal 12 n/c 13 n/c 14 n/c 15 n/c 16 n/c 17 n/c 18 vccdigital 19 data 20 cs 21 clock 22 mod_in 23 mux_out 24 SKY72310-362 gnd 1 gnd 2 gnd 3 gnd 4 gnd 5 gnd 6 20 19 18 17 16 15 7891011121314 28 27 26 25 24 23 22 21 gnd gnd gnd vtune gnd gnd gnd gnd rf_out gnd gnd gnd gnd gnd gnd gnd vdd n/c n/c n/c bs1 bs0 sky73120 r56 0 r36 330 r39 0 r41 10 k r42 10 k r76 0 r2 4.7 k dni r5 10 k r4 0 r3 dni r37 390 r24 0 r34 180 r40 10 r9 4.7 k r1 4.7 k r10 10 k r11 10 k r50 0 r48 3.9 k r51 750 r83 0 r84 0 r44 10 r16 10 r6 4.7 k r12 10 k r33 18 r30 10 c15 1 f c16 100 pf c21 1 nf c18 22 pf c20 22 pf c22 1 f c23 1 nf 12 14 15 20 19 18 17 16 15 14 13 12 11 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 j1 n/a j3 + c5 68 pf c8 68 pf c30 39 pf a3 a4 a5 a6 a7 a8 gnd b8 b7 b6 b5 b4 b3 b2 b1 oe vcc dir a1 a2 1 2 r52 0 dni r58 0 r47 0 r21 0 r46 0 r68 0 r69 0 r70 0 r71 0 l6 blm21a601s l3 blm21a601s a a a a a a a a a c78 100 f/16v c77 22 f/10v c76 22 f/10v c75 10 f/16v c48 10 pf c50 22 pf c61 22 pf c49 10 nf c45 dni a a a a a l13 10 nh l7 blm21a601s a a a a a a a a a a a + c63 10 f a vccxa_3v + c59 10 f a l8 blm21a601s vccpm_3v + c65 10 f a a c64 0.1 f a c60 0.1 f a a a a a a a a a c25 1 f c9 1 f c34 1 f c36 1 f c37 1 nf c35 100 pf y1 24 mhz c41 22 pf c42 22 pf c53 0.022 f c26 100 pf c46 1000 pf c47 330 pf a a a a a a a c10 100 pf a a a a a a jp8 jp1 lockm_det 1 2 1 2 jp4 vcccpm 1 2 jp7 1 2 a vccd_fnfs a a l10 blm21a601s l11 blm21a601s vccmecl/cml_3v + c68 10 f a + c71 10 f a c70 0.1 f c66 0.1 f c72 0.1 f a c79 100 f/16 v l12 blm21a601s s1259 figure 13. SKY72310 application schematic (with sky73120 vco)
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 17 vt rfout vcc gnd out in gnd gnd gnd gnd gnd vcc 1 2 3 4 5 6 18 17 16 15 14 13 7 vcccml_main fvco_main ld/psmain vcccp_main cpout_main n/c 8 xtalacgnd/ocs 9 xtalin/osc 10 xtalout/nc 11 vccxtal 12 24 23 22 21 20 19 gndxtal mux_out mod_in clock data vccdigital t2 etc1-1-13 v614me01 osc2 1 3 2 4 1 2 3 3 1 2 4 5 7 8 1 2 4 6 5 c15 1 f c25 1 f c34 1 f c36 1 f c37 1 nf c53 0.022 f c50 1 f c46 470 pf r30 10 r51 750 r21 0 r69 0 l7 blm21a601s l6 blm21a601s l3 blm21a601s l10 blm21a601s l8 blm21a601s l11 blm21a601s l12 blm21a601s r71 0 r68 0 r13 dni r48 2 k r46 0 r39 18 r47 2 k r32 18 r52 dni r40 10 r83 0 r44 10 r16 10 r84 0 r49 dni r34 18 r33 18 r74 18 r73 120 r58 0 r26 120 r36 120 c16 100 pf c26 100 pf c35 100 pf l1 dni l2 dni c52 dni c55 dni c56 dni c57 dni c58 dni y1 24 mhz c47 330 pf c30 39 pf c45 100 pf c18 22 pf c20 22 pf c42 22 pf c5 68 pf vccmecl/cml 3 v vccxa 3 v vccmecl/cml 3 v vccd_fnfs vccmecl/cml 3 v vccext1 vccmecl/cml 3 v jp1 vcccpm 3 v c43 dni c51 dni c74 dni c54 dni c44 dni cd9 1 f cd10 100 pf c22 dni c48 68 pf c49 1 nf c41 22 pf c14 dni r22 dni c13 dni vccmecl/cml 3 v vna-25 dni vna-25 dni vccmecl/cml 3 v c1 dni r4 dni c2 dni vccmecl/cml 3 v n/c n/c n/c n/c n/c n/c r24 18 r76 18 r63 dni r57 dni r61 dni r75 120 r56 dni r80 10 vcccpm 3v vccd_fnfs + r59 dni r72 dni r60 dni tts05v-19.2mhz dni 3 1 2 4 vccmecl/cml 3 v r62 dni 1 2 jp5 1 2 jp4 out in gnd gnd gnd gnd gnd vcc 3 1 2 4 5 7 8 6 a1 era-3sm dni out vdd gnd out vcont in gnd gnd 1 2 4 3 j1 j3 j6 dni fvco_main cs + power supply c66 0.1 f c64 0.1 f c60 0.1 f c65 10 f + c71 10 f + c70 0.1 f c72 0.1 f c63 10 f vcxa 3 v + c59 10 f vccmecl/cml 3 v + c68 10 f s126 9 to microprocessor figure 14. SKY72310 application schema tic (with non-skyworks vco)
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 18 july 30, 2008 ? skyworks proprietary and confidential information ? products a nd product information are subject to change without notice ? 200705e r0.20 0.35 0.10 0.5 side view bottom view detail a detail b (even terminal side) detail c top view all measurements are in millimeters. dimensioning and tolerancing according to asme y14.5m-1994. s1054 4 a c CbC CaC b 0.15 c pin 1 indicator 0.20 ref seating plane 0.02 +0.03/C0.023 2.70 +0.10/C0.15 0.25 +0.05/C0.07 2.500 2.500 2.70 +0.10/C0.15 see detail a detail c exposed pad detail b (4 places ) 4 0.25 2x 0.15 c 0.08 c 0.10 c 2x 24x 3 0.90 0.10 c a b c 0.100 m 0.05 m figure 15. SKY72310 24-pin qfn package dimensions s1056 8.00 0.10 4.00 0.10 2.00 0.05 1.75 0.10 12.00 +0.30/C0.10 5.50 0.05 ? 1.50 0.10 ? 1.50 0.25 reference pin indicator 0.229 0.02 4.25 0.10 10 o max 10 o max 1.13 0.10 4.25 0.10 notes: 1. carrier tape material: black conductive polycarbonate or polysterene 2. cover tape material: transparent conductive psa 3. cover tape size: 9.3 mm width 4. all measurements are in millimeters a b b a b a figure 16. SKY72310 tape and reel dimensions
data sheet ? SKY72310 frequency synthesizer skyworks solutions, inc. ? phone [ 781] 376-3000 ? fax [781] 376-3100 ? sales@sk yworksinc.com ? www.skyworksinc.com 200705e ? skyworks proprietary and confiden tial information ? produc ts and product information ar e subject to change witho ut notice ? july 30, 2008 19 ordering information model name manufacturing part numb er evaluation kit part number SKY72310 2.1 ghz frequency synthesizer SKY72310-362lf tw17-d460 (with sky73120 vco) tw14-d880 (with non-skyworks vco) copyright ? 2007, 2008 skyworks solutions, inc. all rights reserved. information in this document is provided in connection with skyw orks solutions, inc. (skyworks) products or services. these m aterials, including the information co ntained herein, are provided by skyworks as a service to its customers and may be used for info rmational purposes only by the cu stomer. skyworks assumes no res ponsibility for errors or omissions in these materials or the information contained herein. skyworks may change its documentat ion, products, services, specific ations or product descriptions at any time, without notice. sk yworks makes no commitment to update the materials or information and shall have no responsi bility whatsoever for conflicts, incompatibilities, or other diff iculties arising from any future changes. no license, whether express, implied, by es toppel or otherwise, is granted to any in tellectual property rights by this document . skyworks assumes no liability for any materials, products or information provided hereunder, including the sale, distribution, re production or use of skyworks products, information or mate rials, except as may be provided in skyworks terms and conditions of sale. the materials, products and information are pr ovided as is without warranty of any ki nd, whether express, implied, statutory, or otherwise, including fitness for a particular purpose or use, merchantability, performance, qualit y or non-infringement of any intellectual property right; all su ch warranties are hereby expressly disclaimed. skyworks does not warrant the accura cy or completeness of the information, text, graphics or other items contained within these ma terials. skyworks shall not be liable for any damages, including but not limited to any special, indirect, incidental, statutory, or consequentia l damages, including without limitation, lost revenues or lost profits that may result from the use of the materials or information, wheth er or not the recipient of mat erials has been advised of the possibility of such damage. skyworks products are no t intended for use in medical, lifesaving or life-su staining applications, or other equipment in which the failure of the skyworks products could lead to personal injury, death, physical or environmental damage. skyw orks customers using or selli ng skyworks products for use in such applications do so at their own risk and agree to fully indemnify skyworks for any damages resulting from such improper use or sale. customers are responsible for their products and applications us ing skyworks products , which may deviate from published specifi cations as a result of design de fects, errors, or operation of products outside of published pa rameters or design specifications. customers sh ould include design and operating safeguards to minimize these and other risks. skyworks assumes no liability for applications assistance, customer product de sign, or damage to any equipment resulting from the use of skyw orks products outsid e of stated published specifications or parameters. skyworks, the skyworks symbol, a nd breakthrough simplicity are trademarks or registered tradem arks of skyworks solutions, inc ., in the united states and othe r countries. third-party brands and names are for identification purposes only, and are the proper ty of their respective owners. additional information, includ ing relevant terms and conditions, posted at www.skyworksinc.com, are incorporated by reference.

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